Past students

Postgraduate (PhD)

1. Edward Jaja - Algorithms for Fast Implementation of High Efficiency Video Coding (PhD, 2016).

2. Omid Ayat - Optimizing Memory Bandwidth for Convolutional Neural Network (co-supervise with Prof. Khalil) (PhD 2019)

3. Muhammad Sultan - Hybrid Mapping of Network on Chip Architectures (co-supervise with Dr. Nadzir) (PhD 2022)

4. Shahriyar Masud Rizvi - Spectral Domain CNN Optimized for Computational and Memory (PhD 2023)

5. Muhammad Haleem Junejo - Hybrid Trust Model for Reliable Grouping-based Communication in VANET (PhD 2024)

Postgraduate (M.Phil)

1. Nur Atiqah Latib - ASIC Design of the Bluetooth Link Layer Controller (Talentcorp/Intel student) (M.Phil 2019)

2. Ung Shen Jie - ASIC Design of the GFSK Modem for the Bluetooth Controller (Talentcorp/Intel student) (M.Phil 2019)

3. Ainy Haziyah Awab - ASIC Design of an Energy Efficient HEVC Transforms (M.Phil 2021)

4. Lee Mei Xiang - ASIC Design of Fast Multiplier-Accumulator for CNN. (M.Phil 2021)

Postgraduate (M.Eng)

1. Ng Yan Duan - RTL Design of the Inverse Discrete Cosine Transform for HEVC (M.Eng, 2017).

2. Ho Kang Ken - Automated Tools to Generate Multiplierless Architecture for Matrix Multiplication (M. Eng, 2017).

3. Mohd Faiz Mohd Asri - Dataflow Actor Network Bi-Partitioning Algorithm for Hardware Implementation (M. Eng, 2017).

4. Nurul Haizum Ariffin - Pipeline Synthesis and Optimization of Dataflow Graphs using Simulated Annealing (M. Eng, 2017).

5. Khalil Asyrani (Intel part-time) - Porting Dataflow Actor RTL ASIC Synthesis (M. Eng, 2016).

6. Chin Yong Huan (Intel part-time) - Dataflow Actor Network Partitioning for Multiple FPGAs Systems Implementation (M.Eng, 2016).

7. Khoo Zhi Yion (Intel part-time) - Parallel Implementation of HEVC Integer Transform (M.Eng, 2016).

8. Nurulnajah Mohd Zabidi - VLSI Design of a Pipelined Discrete Cosine Transform (M.Eng, 2015).

9. Ng Mun Yee - VLSI Floorplanning of Actor Based Systems. (M.Eng 2018)

10. Heh Whit Ney - RTL Design of the SATD for HEVC Encoder. (M.Eng 2018)

11. Woo Yit Weng - Profiling Dataflow Programs via Hardware Simulation. (M.Eng 2018)

12. Goh Dih Jian - RTL Design of the 2D HEVC DCT. (M.Eng 2018)

13. Syasya Farina - Data Augmentation Methods for Imbalanced Datasets in X-ray Imaging (M.Eng 2022)

14. Othman Hanafi - High-level Design and Synthesis of VLSI Cell Placement Algorithms (M.Eng 2022)

15. Cheong Zheng Quan - Wirelength Estimation Methods using Machine Learning Techniques (M.Eng 2022)

16. Faris Izwan - Winograd Convolution in CNN using HLS methodology (M.Eng 2023)

17. Choo Kuan Yuan - Robust AI-Based Recycle Waste Classification with Raspberry Pi (M.Eng 2023)

18. Ian Gooi Liang Yu - Design of Deep CNN using HLS4ML Methodology (M.Eng 2024)

19. Kok Hui Yee - Optimizing CNN on FPGA using High-level Synthesis (M.Eng 2024)

Undergraduate

1. Bryan Chan Jia Ching - Implementation of 8x8 2-D DCT on Programmable SoC (B. Eng 2017).

2. Gan Yi Reng - Implementation of Actor Based JPEG Encoder on Xilinx FPGA (B. Eng 2017).

3. Muhammad Afifi - Implementation of FSK Modem on Xilinx Zynq Programmable SoC (B. Eng, 2016).

4. Rusaimi Amira - High-level Design of Arithmetic Coding for JPEG Encoder (B. Eng, 2016).

5. Firdaus Bin Fadzil - FSK Modulation on Xilinx Zynq Programmable SoCs (B. Eng, 2015).

6. Liew Mei Fang - FPGA Implementation of ADSB Modem with Dataflow Programming (B. Eng, 2015).

7. Muhammad Fakhri - SW/HW Co-design of image filters on Zynq SoC (B.Eng 2018)

8. Lawrence Liong - Hardware-Software Co-Design of zig-zag and quantization on Zynq SoC (B.Eng 2018)

9. Joyce Ng Ting Ming - Wirelength Estimation Methods in VLSI Cell Placement (B.Eng 2021)

10. Lew Zhen-Sen - Routability Estimation Models in VLSI Cell Placement. (B.Eng 2021)

11. Kevin Lim Kheng Beng - Hardware Accelerators for VLSI Cell Placement. (B.Eng 2021)

12. Teo Ting Khang - RISC-V Hardware Accelerator for Winograd Convolution (B.Eng 2022)

13. Chan Kai Tung - Optimizing the Backend Physical Design of RISC-V SoC (B.Eng 2022)

14. Muhammad Jabrullah - Implementation of HEVC Transforms on Efinix FPGA (B.Eng 2022)

15. Tu Shen Yong - ASIC Design of Floating Point Adder and Divider (B.Eng 2023)

16. Tommy Lau Pick Wu - ASIC Design of Floating Point Cos and Sin Functions (B.Eng 2023)

17. Chai Han Qing - ASIC Design of Floating Point Subtractor and Multiplier (B.Eng 2023)

18. Bryan Boo Wei Wei - Accelerating CNN on Efinix FPGA using Multi-core Processor and Custom Accelerator (B.Eng 2023)